Department of Electronics Engineering
 
 

Head : Dr.V.Vaidehi
Phone : 044-22516349/6351
Fax : 044-22232403

The Department of Electronics Engineering established in the year 1949 has its core strength in the area of Electronics & Communication Engineering. This department offers U.G course (full time and Part time on B.E. Electronics and Communication Engineering and two P.G. courses namely 1. M.E. Avionics Engineering, 2. M.E. Communication & Networking. This department also offers M.S. (by research) and Ph.D programs.

The cutting edge research areas include Avionics, Communication Technologies, Optical Communication, Network Security, Parallel Processing, Sensor Networks, Signal Processing, Image Processing, Pattern Recognition, VLSI and Wireless Communication. The department has collaborative partners from academia and industry both locally and worldwide. This department has Communication, VLSI, Networking, Digital Signal Processing, Microprocessor, Microwave and optical laboratories with state of art equipments. The department has received funding from FIST for setting up VLSI and Communication Labs. Most of the Labs are modernized with TEQIP funding. Several short term courses and workshops have been conducted for academics and industry personnel.

Areas of Research Interest

i. Avionics
Design and Development of UAV, Attitude Control of small satellites, Fuzzy logic & Neural Networks for Flight Control Studies, Navigation Systems and Image Processing, Radar Tracking and data fusion.

ii. Communication and Signal processing
Advanced communication techniques, Image processing and pattern recognition, Information theory and coding, Optical communication systems, RF Engineering, Speech recognition and synthesis, Statistical signal processing.

iii. Networking
Network security, Optical networks, Wireless LAN and MAN technologies, Wireless mobile communication, Parallel & Distributed Processing, Wireless Sensor Networks, Intrusion Detection System, multicast security

iv. VLSI
ASIC design, RF system design, VLSI architectures for Signal Processing, Analog VLSI, Real Time Embedded Systems.

 

Faculty Profile

Name and highest qualification Designation Phone No. & E Mail Expertise
Dr.V.Vaidehi, Ph.D.
Professor
vaidehi@annauniv.edu
Parallel processing, networking, Target Tracking
Dr.K.Boopathy Bagan, Ph.D.
Professor
boopathy02@yahoo.com
Signal processing and Communications
Dr.M.Ganeshmadhan, Ph.D.
Asst.Prof.
mganesh@annauniv.edu
Optical RF Communication
Dr.Mala John, Ph.D.
Asst.Prof.
malajohn@mitindia.edu
Signal processing and Communications
Mr.R.Hariharan,M.E.
Lecturer(SG)
-
Applied electronics
Mrs.S.Indiragandhi, M.E.
Lecturer(SG)
indira@mitindia.edu
Optical Communication & Networks
Mrs.P.Indumathi, M.E.
Lecturer(SG)
indu@mitindia.edu
Communication Systems
Mr.M.Kannan, M.E.
Lecturer(SG)
mkannan@mitindia.edu
VLSI
Mr.D.Meganathan, M.E.
Lecturer
meganathan_phd@annauniv.edu
Applied Electronics
Mrs.G.Anitha, M.E.
Lecturer
anithaariva@yahoo.com
Controls
Mrs.P.T.V.Bhuvaneswari, M.E.
Lecturer(SG)
bhuvaneswari_mit@rediffmail.com
Networking
Mrs.S.P.Joy Vasantharani M.E.
Lecturer
joy_rani@yahoo.com
VLSI Neural Fuzzy Controllers
Mr.S.Moorthi M.E.
Lecturer
srimoorthi@annauniv.edu
Applied Electronics
Mr.A.Velmurugan M.E.
Lecturer
velyya@yhaoo.com
Microwave and optical Engineering
Mr.K.Senthilkumar M.E.
Lecturer
ksk_mit@rediffmail.com
Avionics engineering
Mrs.G.Kavitha M.E.
Lecturer
kavithag_mit @rediffmail.com
Image Processing
Mr.S.Piramasubramaniam
M.E.
Lecturer
nanthanpirama@yahoo.co.in
Optical Communication
Mrs.S.Vasuhi M.E.
Lecturer
vasuhi_s@rediffmail.com
Microwave and optical engineering
Mr.P.Prakash M.E.
Lecturer
Prakashp_79@yahoo.co.in
Communication Systems
Ms.G.Sumithra M.E.
Lecturer
gs-mithra@yahoo.com
Communication Image Processing
Ms.T.Subashri M.E.
Lecturer
subarathi@yahoo.co.in
Communication system
Ms.C.Sridevi M.E.
Lecturer
sridevijegan@gmail.com
Image Processing
Ms.A.Viji M.E.
Teaching Fellow
mailvijis@gmail.com
VLSI Signal Processing
Mr.M.Malleswaran M.Tech
Visiting Faculty
Mallesh1971@yahoo.com
Reconfigurable parallel architectures for networking applications
Ms.R.Kayalvizhi M.E.
Teaching Fellow
kavikkayal@gmail.com
Embedded systems, computer networks
Mr.L.Rajesh M.E.
Teaching Fellow
Rajeshloganath@yahoo.co.in
Networking
Ms.D.C.Diana M.E.
Teaching Fellow
Diana_ece@yahoo.co.in
Network Security

List of sponsored projects

Sl.No. Title of the Project
Agency
1.
Micro Satellite Project(Communication, Control and S&F protocol development)
ISRO
2.
FOSS Free Open Source Software
MCIT, GOI
3.
Development of an Intrusion Detection System and Development of Semantic Cache in Query Processing
Xambala
4.
Multi Sensor Data Fusion
TCS
5.
Power optimization in Wireless Sensor Networks
TCS
6.
Content Based Image Retrieval
TCS

R&D CONTRIBUTIONS

Development of micro satellite
Parallel Architecture for signal processing
Semantic intrusion detection system
Semantic caching in query based networks
Multicast security
GPS signal simulator
Reconfigurable Architectures for signal processing
VLSI Architecture for fuzzy logic controller
Multi sensor data fusion
Scheduling Algorithms for Multi Processing System.
Modern power spectral Estimation methods
Circuit Simulation of Optical Bi-stability in Semi conductor
On the Application of Wavelets for Image Deforms
Constraint based RWA for Optical Networks
Studies on Traffic Control mechanism in ATM networks
ILP Architecture with spectral functional units
Design of High Speed High Resolution Vision aided inertial navigation & Flight Control
Multicasting in Wireless Sensor Network
VLSI applied to process control
Intelligent Flight Control Studies on Unmanned Aerial Vehicle (UAV)
Image Segmentation of moving objects
Routing protocols for Wireless Ad-Hoc Networks
Target Tracking-Data Fusion
Radio over fiber for wireless applications
Target tracking using Particle Filters
Pattern Recognition Algorithms Image Processing
Security issues in VOIP networks
Parallel architecture for video compression.

Store and forward payload for micro satellite
Reconfigurable architectures for VOIP applications
Mobility Prediction in wireless networks

• Development of GPS Real Time Signal Simulator sponsored by ARDB, DOE, SANDS.
• Development of Tracking Algorithm for Ship borne RADAR sponsored by LRDE
• Foot Measuring System, Funded by CLRI.
• Multimedia-Over Internet, Funded by DOE.
• Parallel Processing Solutions for ADSP Algorithms, sponsored by AICTE.
• FPGA Implementation of DSP Systems, sponsored by AICTE.
• Development of IP-cores, sponsored by COMIT Systems Inc.
• Development of microsatellite: The Electronics department in MIT is responsible for setting up ground station, store & forward payload and satellite control. (Funded by ISRO Rs.4 crores) (Jointly by MIT and CEG)
• Design and Development of a Semantic Intrusion Detection System and Semantic Caching in Query Based Networks, Funded by XAMBALA Inc.
• FOSS Free Open Source Software (Funded by MCIT, GOI) (jointly with AUKBC)
• Content based image retrieval (Funded by TCS)
• Multi sensor data and image fusion (Funded by TCS)
• Power optimization in wireless sensor network (Funded by TCS )

Value of Research Projects taken up during 2003 to 2007:
Completed Projects Ongoing Projects
No Value(Rs Lakhs) No Value(Rs Lakhs)
6 59 4 43

Brief Write up of Most Successful Research Projects:

Real-Time GPS Satellite Signal Simulator

A Real-Time GPS signal simulator (RTGPSSS) is an instrument capable of simulating high fidelity L1 C/A signal, which is fed at the RF front end of the GPS receiver. These signals are similar to the one exists at the antenna of the GPS receiver in real time. RTGPSSS test facilities are used to test the software and hardware of GPS receivers and their augmentation systems. Almost any type of GPS receiver test procedure requires the use of RTGPSSS. These simulators replicate transmitted RF signals from satellites visible at a receiver’s location. The simulators usually have a trajectory profile generator for dynamic receiver applications. In this project a low cost solution for the design of RTGPSSS using DSPs & FPGAs is considered.

Parallel Processing Solutions for Adaptive Digital Signal Processing

There is a great emphasis on using Adaptive Digital Signal Processing for a wide spectrum of applications in communications, signal and image processing. Engineers dealing with real-time, Adaptive Signal Processing are demanding computational speeds, normally not realisable using single Processors. Parallel processing has been proposed as a solution to computationally demanding problems. Most of the Adaptive DSP algorithms possess a high degree of parallelism. In any algorithm parallelism could be exploited at various levels, viz., Program level, Task level, and Intra Instruction level.
This project deals with the development of Parallel Adaptive DSP algorithms viz., Recursive Least Square (RLS), Least Mean Square (LMS), and Kalman algorithm for the real-time critical applications namely, Image Estimation and Multi Target tracking.

Design of Semantic Intrusion Detection Systems

Intrusion Detection is a very crucial aspect of network security. It is the technique used to detect intrusions in the network and alert the users. The project is developed as a semantic IDS engine working in the application level.
Given a set of rules (each dictating a number of constraints that the input data must fulfill to trigger it) the IDS engine will find malicious events using as few redundant comparisons as possible. A translator is developed which converts the simple user written rules to a format that could be understood by the Lex tool. BNF grammar for the simple user written rules is designed such that a semantically efficient rule-base is generated by the translator. The translator merges the newly generated rule-base with the already existing rule-base in the IDS. IDS implementation is done in Linux platform using Lex and Yacc tools. The system was implemented completely in web environment and the results are presented with performance analysis.

Store & Forward Payload


The primary payload of Polar orbit micro-satellite ANUSAT is Store & Forward (S&F) messages. S&F stores the messages in onboard memory and forwards them when the user requests them in the visibility period. This consists of development of both Data link layer and Application layer functionalities. HDLC protocol is used in logical link connection and polling technique is used for medium access control. The application layer functionalities are memory manager and scheduler. The target processor is Intel 80186. The executable code is triggered by a Tele command in the telecommand channel from the Master control station.

Image Processing Hardware

Developed a High Pass Filter (hardware) (Analog) to be used in Speckle Interferometry based experiments.
FPGA Based DSP System Development

Development of Developed IP Cores

Developed IP cores - FFT, Viterbi decoder

Microsatellite Project

A microsatellite (ANUSAT) is being developed at Anna University. The tasks assigned are detailed below:

Telecommand & Telemetry Station
A full fledged ground station has been implemented to carry out Telecommand transmission and Telemetry reception. The work involved integration of all the subsystems ranging from Antenna to data reception (transmission) on a PC. The complete Telemetry system has been already validated using HAMSAT signal.

Store & Forward ground station
A Store & Forward ground station operating at (VHF transmitter & UHF receiver) has been implemented. The system operates with BFSK modulation at 1.2kbps. The baseband receiver and transmitter sections have been implemented on an FPGA.

Content Based Image Retreival

It involves development of algorithms towards detection of an object in a video frame and classification based on the variations within the object class.